Dimitrios DANOPOULOS

AI Hardware Engineer

Hello, my name is Dimitrios, and I joined CERN in 2024 as an Experienced Project Graduate in the SFT group within the EP department. My work focuses on optimizing machine learning model inference pipelines for the Next Generation Triggers project, specifically in preparation for the High-Luminosity LHC upgrade. I am contributing to the design and development of hardware architectures tailored for ultra-low latency ML applications (T1.2), enabling real-time processing of data streams from particle collisions.

Before joining CERN, I completed my PhD at NTUA in Athens, where I specialized in hardware-software co-design for deep learning applications. I am thrilled to bring my expertise to support cutting-edge research and to collaborate with CERN’s outstanding team! [list of publications: https://scholar.google.gr/citations?user=WxR0SUEAAAAJ&hl=en ]